1. Field of the Invention
The present invention relates to automated bonding of chips to a tape and more particularly to formation of bonding structures on Tape Automated Bonding (TAB) packaging structures. This invention also relates to interconnections in a multilayer, electronic packaging structure. Moreover, this invention relates to an interconnection structure providing a universal chip connection.
2. Description of Related Art
A. TAPE AUTOMATED BONDING
A few decades ago, a very popular form of packaging of semiconductor chips involved connections from a package by means of fly-wire leads which were attached from pads on a surface of the packaging substrate to pads on a chip supported by the package. The fly-wire leads were employed for electrical connection of a chip to an electronic system through the external connection pins of a wire-bonded package, such as a Dual In-line Package (DIP). Those pins are inserted into connections in the circuit board onto which the wire-bonded package is inserted. The fly-wire leads are applied between the pads on the chip and the pads on the leadframe inside of the wire-bonded package by means of an elaborate process of wire bonding. Fly-wire leads employed in the wire-bonded package are fragile and the bonds between the fly wire leads and the chip and the package are fragile. Fly-wire leads are about 0.025 to 0.050 mm in diameter. In addition, the fly-wire leads extend high above the chip and must be applied individually between each two points to which they are attached by a separate procedure of manipulation of each individual fly-wire lead and then a bonding procedure for both ends of each separate fly wire. Now packaging has evolved to the use of various more compact structures which require fewer steps in manufacturing, and which offer greater simplicity and reliability.
In contemporary, Very Large-Scale Integration (VLSI), electronic packaging systems, the approach of using fly-wire leads to connect between a package and pads on a chip is not as practical an approach, because with increasing density of circuits on a chip, and smaller pads, wires must be ever closer together because the number of wires to be joined per chip is increasing as the density of circuits increases. The pitch of pads on a chip is the distance pad center to pad center. While wire bonding can be performed with 25 micron wire (1 mil), a pradctical spacing limitation is wire bonding of about 2 mil pads with a 5 mil pitch. With such small dimensions, the problems of wire bonding are that the bonding tools are likely to damage adjacent bonds or wires.
Tape Automated Bonding (TAB) was developed almost two decades ago to make it possible to have thin, short beam leads supported and held in place by tape, with just the tips or ends of the beam leads extending from the periphery of the tape to a point just above the pads to which they are to be joined on the chip. In TAB, the beam leads extend over the chip pads on the periphery of the chip into a position in which they can be bonded by termocompression bonding. All of the leads are bonded with a single step operation in which a thermode, i.e. a heated platen, is heated to a high temperature. The hot thermode tool presses on te ends of the leads to bond them to pads below them on the chip. All that is required is that the pads and the leads should be in alignment, and that the leads of the package should be capable of coming into contact with the pads without any adverse effect upon the mechanical and electrical integrity of the leads. See Lyman, "Special Report: Film Carriers Star in High-Volume IC Production" Electronics, Dec. 25, 1975, pages 61-68, where at page 64, col. 2, the thermode temperature of the thermocompression bonding machine is listed as 550 deg. C., with a dwell time of 0.25 sec. and a bond force of 1.25 kg. Note that the range of temperatures for the bonding process falls between 300 and 700 degrees Celsius. C. D. Burns, in "Trends in Tape Bonding", Semiconductor International, April 1979, pages 25-30 describes subsequent developments in TAB. The typical pad pitch for TAB parts is 8 mils, with some commercial examples of 4 mils.
In the past it has been suggested that one should place metallization extending upwardly (outwardly) in the form of bumps on either the pads or the tip ends of the leads to allow for slight misalignment, to reduce the area of the bond, to reduce the complexity of the thermode design required for thermocompression bonding and to reduce the bending forces required to join the leads and the pads and to insure electrical contact only at the intended points. First, regarding the formation of such bumps on the electronic devices, one must use either an additive process of deposition or a subtractive process of etching or the like which requires extensive processing steps such as application of masks and removal thereof. Moreover, if chemical plating (or chemical etching) is involved in forming bumps on chips, the plating (or chemical etching) process employed may require the exposure of the chips to chemical treatments which may leave unwanted residues behind on the surfaces of the chips which may cause corrosion. J. Sallo, "Bumped-Beam Tape for Automatic Gang Bonding" Insulation/Circuits Vol. 25, No. 10 (1979) pp 65-66 makes it clear that it is difficult to apply the bumps to a TAB structure. Accordingly, there is a need for a system including structures and processes which will afford packaging without requiring the use of plated or etched bumps in connection with the pads of the electronic device.
Tape Automated Bonding (TAB) requires the use of either bumped chips or bumped tape to facilitate inner lead bonding (ILB) of the copper tape beams to the chip I/O pads. Processing of chip wafers to add bumps adds cost to the TAB process and presents a risk of damage to the chip wafers, especially for sensitive CMOS circuitry. Commercially available electro-deposited and etched bumped tapes is an alternative. However, the bumps on the beam ends of such bumped tape are mechanically hard and as a result of the mechanical hardness are capable of damaging the chip I/O pads or cracking the chip when force is applied during the bonding process. Commercially available bumped perimeter tape is more expensive than planar tape because it requires double photoresist processing and associated alignment.
An alternative approach to placing a bump on the electronic device is to fabricate a bumped structure on the TAB leads. This has been demonstrated for single-layer (all metal) TAB tape in which both sides of the tape are photolithographically processed. Single-layer tape has intrinsic factors which limit its application to chips having relatively few leads (I/O's). Furthermore, the all metal tape is untestable before mounting the device on the next level package. Thus, to provide the more desirable application of TAB to high I/O devices in a testable configuration, a means of fabricating bumps on 2 or 3 layer tape is necessary, since this type of tape is compatible with large numbers of I/O. As will be described below this bumping process for two-layer or three-layer tape is difficult.
Two or three layer bumped tape has been made by using a polymeric film coated on one or both sides with metal films. Bumped tape is difficult to fabricate economically from a two or three layer tape because of the problems of alignment and processing costs with the double photolithography required, plus the need to form holes in the polymeric layer as well. To manufacture a TAB product with the capacity of supplying a large number of I/O connections, one must use two or three layer tape because of the need for a polymeric support layer for the metallization.
U.S. Pat. No. 4,510,017 of Barber for "Testable Tape for Bonding Leads to Semiconductor Die and Process for Manufacturing Same" shows a bumped tape lead in FIG. 2 thereof which comprises a copper lead preferably, optimally plated with gold or tin. The patent discusses some problems of manufacturing TAB tape using conventional processes and teaches a method of forming bumped tape which is testable.
K. Hayakawa et al "Film Carrier Assembly Process", Solid State Technology Vol. 22, No. 3, p. 52 (1979) describes a version of bumped tape in which bumps are plated on a separate substrate and are transferred onto the tape for subsequent bonding to the electronic device.
U.S. Pat. No. 4,396,457 of Bakermans for "Method of Making Bumped-Beam Tape" discusses bumped-beam tape, and the problems of putting bumps on tape. The solution described in that patent is to microemboss the TAB tape to form the bumps in the TAB tape. The tape is composed of a copper foil which may or may not be laminated with a polyimide film which is etched to form circuit patterns forming beams. The tape has multiple punched registration or sprocket holes for advancing the tape through a manufacturing system. FIG. 6 of Bakermans shos a method of making bumped-beam tape, the polyimide of the tape is formed onto the copper and then the polyimide is etched to form personality holes. No adhesive layer is involved, however. In FIG. 7 of Bakermans, only a single layer of copper is involved. According to Bakermans, bumps are formed on the beams by means of one of two processes. 1. Punch a set of large personality holes in the polyimide for the bumps and beams to be formed in the metal layer. 2. Laminate the copper foil to the polyimide. 3. Punch the copper to form bumps. 4. Etch away the unwanted copper to form the beams with the bumps at the ends of the beams. 5. Plate the beams with gold.
The second process involves a different set of steps. 1. Punch a set of large personality holes in the polyimide for the bumps and beams to be formed in the metallic layer. 2. Laminate the copper foil to the polyimide. 3. Etch the copper to form beams. 4. Punch the end of each beam to form a bump. 5. Plate the beams with gold or another noble metal. It is clear that the Bakermans bumps are one-sided and hollow where they are punched. In the punched bump process of Bakermans or the bumped tape of Barber, supra, the bumps do not extend both above and below the beam.
Preferably, also, the bumps and the pads are of equal hardness as that gives the best deformation when forming a joint by thermocompression. Much of the prior art fails to provide equality of hardness between the metallic structures to be joined to the chips. Most TAB components in production use bumped chips, the manufacture of which involves a costly procedure that exposes the wafers to yield degradation caused by the wet chemical processing required. Moreover, adhesion of the bumps to the device metallurgy is frequently limited. In addition, there is the problem of irregular size and shape of the bumps formed by chemical treatments. Furthermore, to reduce the hardness of the plated bumps, which are usually made of gold, it is common practice to anneal the bumps, requiring exposure of the chips to periods at elevated temperatures.
Balltape
The polymeric Tape Automated Bonding (TAB) tape with electrically conductive leads terminating in balls adapted for bonding to pads on the chips in accordance with this invention, is referred to herein as balltape. Also this metal/polymer structure is able to be used to construct multilayer circuit substrates such as an MLC, printed circuit board of flexible circuit board structure.
European Published Patent Application Ser. No. 0,117,348 of Oakley et al, "Bonding Leads to Semiconductor Devices" published Sept. 9, 1984 shows in FIG. 5 thereof, as described at page 6, lines 9-13 the formation of "bumps on copper tape with a single pulse per finger . . . scanning the beam across a row of fingers." It teaches at page 4, lines 8-16, "a method of forming connecting bumps on the free ends of the conductive leads of a tape for use in the bumped-tape automated bonding process of connecting leads to a semi-conductor circuit device, includes heating the free ends of the leads on the tape by means of a laser beam to melt the ends of the leads so that surface-tension forces form the liquid-phase end of each lead into a ball, constituting the bonding bump." At page 6, lines 4-8 it states "the focus for the laser beam should be at or close to the surface of the leads or fingers. For some materials, an inert gas shield may be required."
B. MULTILAYER PACKAGING
Multilayer circuit packages containing numerous vias (which provide electrical interconnections between layers in the vertical direction) are used to connect numerous signal and power wires between electrical components used in the computer, communications, consumer, and industrial electronics industries. High density packaging is used where it is necessary to pack the components closely together employing many levels of circuitry with fine wire widths interconnected with vias. Materials used for substrates include epoxy/glass, ceramics and polyimide. Some circuits require as many as twenty or more layers of wiring. As the density of integrated circuits increases, along with the advent of reduced size surface mount packages, the need for reliable, low-cost multilayer substrates increases.
In the past vias have been difficult to manufacture in various multilayer packages, because of the numerous process steps involved. The normal manufacturing process for flexible multilayer circuits requires that the interconnecting vias be made in the same manner as they have been made for many years in the epoxy/glass substrates. That is, one drills the via holes, then seeds the holes with an appropriate metal, and plates copper into the holes by an electroless plating process. The final process steps then include etching of discrete conductor lines and laminating the various layers together, and again repeating the above steps for interconnecting subsequent layers with the previous layers by means of additional vias ih the later added layers.
C. UNIVERSAL CHIP INTERCONNECTION PACKAGE
In the past, multilayer substrate packages with non-repairable defects have been discarded because of the lack of suitable repair techniques. Reasons for this include the inaccessibility of internal defects and an insufficient number of engineering change (EC) pads. Such substrates are generally designed either for flip-chip solder mounting as is the case for multilayer ceramic (MLC) or exclusively for plastic-packages containing wire-bonded chips. It has not been possible to substitute one chip type for another. U.S. Pat. No. 4,489,364 of Chance et al for "Chip Carrier with Embedded Engineering Change Lines with Severable Periodically Spaced Bridging Connectors" is just one example of work which has been done to deal with the problem of engineering changes in the past.
D. ADDITIONAL RELEVANT PUBLICATIONS
A paper dated June 11, 1984 entitled "Nikkei Special 1 Assembly of the Next Generation VLSIS, Aluminum Ball Bonding to Connect as Securely as Gold Wires" by M. Suwa et al Nikkei Electronics Microdevices, June 11, 1984 describes formation of balls on the ends of fly-wire leads used for conventional wire bonding of fly-wire leads to IC chips. This is well known, as shown by Suwa et al. The Al balls are formed "instantaneously by imparting a large power to aluminum wire in an atmosphere of argon containing hydrogen." That atmosphere comprises forming gas. The technique used also involved using a high voltage of 1000 V applied no longer than 7 ms with a current of at least 1 Amp. There is no suggestion of the use of the process in connection with TAB or the use of a laser to form the balls.
At page 5, it was stated "a large number of researchers have tried to develop the ball at the tip of aluminum wires by using laser beams, microplasma torch, or short circuit discharge . . . . However, nowwhere could a ball be formed that could compare with the gold balls."
A paper entitled "The Development of Copper Wire Bonding for Plastic Molded Semiconductor Packages" by J. Hirota, K. Machida, T. Okuda, M. Shimotomai, and R. Kawanaka, IEEE pages 116-121 (1985) discusses replacement of gold wire bonding with copper wire bonding of semiconductors to plastic based packages. The article, which does not relate at all to TAB shows (on page 116) a schematic diagram of apparatus for forming a ball on the end of a wire of Al, Cu or Ag by use of a laser beam directed at the end of the wire set in a chamber with an atomosphere containing a shielding gas. It is stated on page 11, Col. 1 under "Ball Bonding Technology" that copper balls are slightly harder than gold, and that making the copper softer so as not to damage a Si chip is a problem. The pads being used on the chips were aluminum pads. Note that an oxygen detector is shown in FIG. 1 of the paper and that argon is used in FIG. 3 where the oxygen content is listed. The smoothness of a copper ball is shown for low oxygen. The presence of a reducing atmosphere is not shown.
U.S. Pat. No. 3,614,832 of Chance et al shows, in FIG. 7 thereof, a laser beam passing through the back of a polyimide decal 19 (Col. 5, lines 45-51) carrying conductor leads 20 to bond the lead 20 to land 13 on a substrate 11. The lead is to be connected to the contact 17 on the chip 15. No suggestion of formation of balls at the ends of the leads prior to bonding is made. In addition, this decal wiring arrangement is significantly different from the TAB structure.
U.S. Pat. No. 4,188,636 of Sato et al describes an arrangement in which the bumps are formed on the semicondutor chip rather than on the beam leads on the TAB packaging structure.
U.S. Pat. No. 3,463,898 of Takaoka et al "Welding Device Using Laser Beams" shows (in FIGS. 2A and 2B thereof) that the end of a wire electrode to be welded by a laser beam can be in the form of a ball. The patent states "In this constructions, it is desirable to form the top end of a lead wire 4 into a ball of larger diameter than the bore of the nozzle center hole as shown in FIG. 2A so that its length will never change when touched on the electrode surface . . . " Col. 3, lines 60-65.
U.S. Pat. No. 3,934,073 of Ardezzone "Miniature Circuit Connection and Packaging Techniques" shows in FIG. 5 shining a high energy beam through the glass block 14 to bond pads 23b of a semiconductor device to lead ends 11b and 11c of a preform. Preferably the beam is a laser beam. Col. 6, line 26-Col. 7, line 12.
U.S. Pat. No. 4,510,017 is a background patent which discusses both bumped-beam tape and TAB. Leads 14 therein have bumps 18 plated on the inner lead ends thereof. Leads 14 are formed of copper and are plated with bumps composed of solder, Ni, Sn or Au. Gold and nickel bumps are hard unless annealed. Such hard bumps can damage the tape. Tin or solder bumps have a limited shelf life problem. Secondly, they are nonuniform in size. Thirdly, they require precision mask alignment. Fourthly, the bumps extend downwardly, but they do not extend upwardly. Fifthly, it is costly to plate up a bump. Sixthly, the plating bath is not likely to create a clean surface. The etching or the formation of the bump from the copper layer can be done, with either step occurring first.
Hard gold bumps are less easily deformed in thermal compression bonding and as a result, they result in less reliable joints. Toward that end, it is a standard practice in the art to anneal hard gold bumps for the purpose of softening them. However, no reports have been found in the published literature of the use of lasers to anneal gold bumps. The problem of hard bumps on chips or beams is aggravated as the lead count goes up resulting in a greater total force on the chip. Therefore, potential excessive load is applied locally due to irregularities in the geometry or a lack of planarity. In the past those skilled in the art have been aware of the problem that "hard" gold plated bumps might damage silicon chips. It is standard practice in the semiconductor chip packaging industry to heat gold wires to form balls for wire bonding of fly wires stitched to chip pads by using wire bonding procedures. But it is a relatively new procedure to use balls on the tip ends of the leads in TAB bonding, as taught by Oakley et al. Instead, bumped tape or bumped chips have been used to connect chip pads to TAB leads. Howvever, bumped tape does not provide sufficiently soft material for satisfactory use with chips. The hard bumps may damage the chips. The bumped tape is heated by means of a heated platen (like an iron) which is known as a "Thermode" which is used in thermal-compression bonding. Alternatively, one can used so called "bumped chips" but that involves a process of exposure of the chips to harmful plating baths or the like to form bumps on the pads of the chips.